| 1. | The ep1k10tc100 which is belong to altera ' s acex 1k series is selected to be configured
设计中选用的高密度可编程逻辑器件是altera的acex1k系列的ep1k10tc100 。 |
| 2. | From the request of practical applications ， the dissertation studies a practical and technological problem about making use of hdpld to implement iir filters
本文从实际应用的要求出发，研究了利用高密度可编程逻辑器件来实现iir滤波器的这一应用技术问题。 |
| 3. | Modifying the parameters can realize all kinds of iir filters with different precision . accordingly ， it is proved that the parameterized design based on hdpld is flexible
并且通过修改参数就能够实现不同精度、不同类型的iir滤波器，从而验证了基于高密度可编程逻辑器件的参数化设计的灵活性。 |
| 4. | In experiment ， multiform input signals are used . the experiment result indicates that the implemented filter has good performance ， which validates the design is correct
在实际测试时，采用了多种形式的输入信号，测试结果表明采用高密度可编程逻辑器件实现的iir滤波器具有很好的滤波效果，验证了设计的正确性。 |
| 5. | On conditions of the current technology ， the thesis puts forward a new high dynamic and whole digital spread spectrum receiver which is based on the high density programmable logic devices
根据现有的软硬件技术条件，结合实际需要，本论文提出并详细分析了一种新的基于高密度可编程逻辑器件的高动态全数字解扩接收机系统。 |
| 6. | The whole 128 - point fft system can be integrated in the altera ' s flex1k100 chip , and the data width is 16 bits . timing simulation results demonstrate that working frequency can reach 40mhz , and processing time is within 112us
选用altera公司的1k100高密度可编程逻辑器件实现128点16位的快速傅立叶变换的单片集成。通过时序仿真说明时钟频率可运行在40mhz ，并且时间为112us 。 |
| 7. | According to the basic theory of iir filters , a scheme of hardware implementation is worked out combining with the fact that coefficients of numerator and denominator of transfer function are fixed and the structural feature of selected hdpld . from the clew of implementing a stratified ， modularized and parameterized design ， the thesis describes the hardware implementation of the iir filter with vhdl and schematic diagram design method . two examples that are iir notch filter and iir low - pass filter are given ， the stability of filters and the effects of quantification of coefficient are also analyzed
以iir数字滤波器的基本理论为依据，结合滤波器的传递函数分子、分母系数固定这一事实和选用的高密度可编程逻辑器件的特点，确定了iir数字滤波器的硬件实现方案；按照层次化、模块化、参数化的设计思路，采用vhdl硬件描述语言和原理图两种设计技术进行了iir滤波器的硬件设计；本文给出了iir陷波滤波器和低通滤波器两个设计实例，对设计的滤波器都进行了稳定性分析和系数量化影响分析；最终将完成的iir滤波器的硬件设计配置到芯片中，并在制作的实验电路中进行了实际滤波效果测试。 |
