Chinese translation for "锁存器"

d latch
flip-latch
latch (electronics)
latch unit
latches

Related Translations:

存:  动词1.(存在; 生存) exist; live; survive 短语和例子残存 remnant; surviving; 名存实亡 exist only in name but not in reality2.(储存; 保存) store; keep 短语和例子存粮 store up grain; 封存 seal up for safekeeping; 水库存了大量的水。

锁存:  circuit, latchlatch

闪存:  flash memory flashflash ram

存卷:  place of file

存行李:  deposition luggatge

存摺:  bank pass-bookpassbook

存油:  oil in storagetrapped fuel

存煤:  stocking coal

家存:  ienaga

存管理:  inventory

Example Sentences:

	1.	Once digitized at baseband , they can be stored in memory and recalled to generate the desired waveform 设计中大量的使用了ecl逻辑的芯片，诸如锁存器，移位寄存器等等。
	2.	Provides a secure connection between the hard drive and the cable connector via a locking latch mechanism . ideal for -透过锁定锁存器装置，为硬碟机和电缆连接器之间提供安全的连接。
	3.	Controlling system is composed of drive circuit , locking memory , shift register . temperature compensating circuit and drive power circuit are also needed 控制系统是由驱动电路、锁存器、移位寄存器等组成，此外还需要温度补偿电路和驱动电源电路，本文对控制系统进行了详细的论述。
	4.	The host pc and terminal machine communicate with each other by udp , and the reading of ic card is through serial port . the measuring apparatus consists of analog switch , ad converter ads1256 circuits while the filtering apparatus is composed of latch 74hc374 控制箱通过udp协议和pc通讯,通过串口读写ic卡;检测仪主板主要由模拟开关和ads1256的电路组成;分选仪主板则主要是由74hc374锁存器组成的分选电路。
	5.	Circuit design is the basis of design of demultiplexer . speed , power and chip area are the main factors that should be considered in circuit design . every circuit structure has its merits and drawbacks , e . g . cmos logic family has a slower speed , but lower power , smaller area , scfl ( source couple fet logic ) family has a higher speed , but higher power , larger area . we should choose a proper circuit structure or their mixed structure for certain design to get a good tradeoff among the three factors . flip - flop is the fundamental element of demultiplexer , setup time and hold up time are key factors , which influence the speed of circuit , thus the design aim is how to reduce them . in this thesis we place emphasis on the design of scfl latches 速度、功耗、面积是电路设计要考虑的主要因素，不同的电路形式具有不同的优缺点，如cmos互补逻辑电路功耗低，面积小，速度相对较慢； scfl (源极耦合fet逻辑)电路速度高，功耗和面积较大。所以要针对具体设计需要选用适当的电路形式或其组合结构，以满足设计要求。触发器是分接器的基本组成单元，建立时间和保持时间是影响电路速度的关键，所以减小建立时间和保持时间是触发器设计的主要目标，本文着重介绍了scfl锁存器的设计和优化方法。
	6.	In addition , make out in detail the design on inner combination logic and time logic of fpga , including series - parallel conversion , data selector , counter , flip - latch , timer , encoder , etc . at one time , not only pursuit flow of the data gathering system is illuminated , but also make use of in reason and effectively inner ram resource of fpga and build it in ping - pong framework 另外，详细的介绍了fpga内部的组合逻辑和时序逻辑的设计方案，包括串并转换、数据选择器、计数器、锁存器、定时器、译码器等。并阐述了数据采集系统的工作流程，而且合理有效地使用了fpga内部的ram资源，将其构建成乒乓式结构。

Similar Words：

"锁床" Chinese translation, "锁存" Chinese translation, "锁存触发器" Chinese translation, "锁存的" Chinese translation, "锁存电路" Chinese translation, "锁存器；门闩线路；凸轮；闩锁" Chinese translation, "锁存器的时序条件" Chinese translation, "锁存器锁存电路" Chinese translation, "锁存器写入" Chinese translation, "锁存全加器" Chinese translation