Chinese translation for "电路逻辑"

circuit logic

Related Translations:

逻辑:  logic 短语和例子有学问而且合逻辑地辩论 argue with learning and logic; 逻辑上的错误 an error in logic; 数理逻辑 mathematical logic; 合乎逻辑 logical; 按照这种逻辑 according to that kind of reasoning; 这是什么逻辑 ? what sort of log

Example Sentences:

	1.	In this way , a simple and direct relation was build up between logical transitions and dynamic current , which makes possible iddt testing pattern generation on logical level 该方法在电路逻辑跳变与电路动态电流之间建立了一种简单直观的关系，使得动态电流测试产生能够在逻辑级上得以实现。
	2.	Experiment results show that this algorithm can identify static crosstalk that destroy circuits function and provide accurate information for ic back - end optimization 实验表明，通过验证噪声幅值和宽度指标，算法准确地识别出对电路逻辑功能产生影响的静态串扰噪声，为ic设计的后端优化提供了准确信息。
	3.	By exploring the characters of dynamic power supply currents of digital circuits using spice , this paper analyzed the relation between iddt and the switching activities when a circuit changes from one logical state to another 本文通过spice实验研究数字电路动态电流的特性，分析了数字电路的动态电流与电路逻辑状态转变之间的关系。
	4.	Traditional static crosstalk identification methods identify crosstalk targets only using coupling capacitance and noise amplitude information , which lead to the pessimistic results and induce a long time to ic design convergence 摘要传统的静态串扰噪声识别算法只验证耦合电容和噪声幅值信息，没有考虑噪声宽度对电路逻辑功能的影响，所以给出的结果过于保守，导致设计收敛的时间被延长。
	5.	This design for mvbc system adopts top - down eda common design flow . circuit design adopts veriloghdl coding description . function simulation and timing verification adopt simulation tool vcs of synopsys inc , the logic synthesis tool and fpga programming tool adopt the quartus ii of altera inc , and the fpga advice stratix ii ep2s15 该mvbc系统设计采用业界通用的自上而下的eda设计方法,电路逻辑实现采用veriloghdl硬件语言描述,功能和时序验证的动态仿真采用synopsys公司的vcs ,而逻辑综合与fpga实现采用altera公司的集成开发环境quartusii软件以及stratixiiep2s15的fpga器件。
	6.	Describes the design and realization of partial run - time reconfigurable fpga in detail . in order to reduce the affect of the reconfiguration time on system execution time , mostly static circuit design method in logical design stage and incremental routing method in component implementation stage are proposed . the fft parallel processing algorithm is examined through vvp platform 本章详细阐述了基于vvp平台的多sharc功能插板的具体硬件实现，以动态重构fpga设计为核心，论述了局部动态重构fpga设计流程和方法，提出了极大静态电路逻辑设计方法和递增式布线方法，以达到减小动态重配置时间，提高系统运行效率的目的。

Similar Words：

"电路流水编号" Chinese translation, "电路流水号数" Chinese translation, "电路路合" Chinese translation, "电路路由选择" Chinese translation, "电路滤波器" Chinese translation, "电路码" Chinese translation, "电路媒介" Chinese translation, "电路媒质" Chinese translation, "电路每小时连接次数" Chinese translation, "电路描述" Chinese translation