| 1. | At last i make proximity link protocol simulations under some usual conditions
最后针对邻近链路协议各种情况做了功能仿真。 |
| 2. | 2 . design the verilog program and finish all kinds of simulation
2 .根据matlab程序编写verilog模块,完成功能仿真和时序仿真。 |
| 3. | 5 . finish the simulation , analysis and validation of the merged blue print system
5 .完成了整个融合方案系统的功能仿真、分析和验证。 |
| 4. | At last , it gives the corresponding functional simulation result and timing simulation result
最后给出了相应的功能仿真和时序仿真结果。 |
| 5. | The main process includes following : system design , module design and function stimulation
主要步骤包括：系统设计，模块设计，功能仿真。 |
| 6. | The results of behavior and post - place & route simulation of all modules also have been represented
并进行了功能仿真和时序时延仿真，给出了仿真结果。 |
| 7. | We adopt asic design technique , using advanced eda tools to design and simulate ccu
Ccu采用asic的全定制电路设计方法，使用先进的eda设计工具进行逻辑设计与功能仿真。 |
| 8. | The paper introduces the idea of l80c196kb ' s simulation , discusses the method to logic simulation
摘要本文叙述了l80c196kb的仿真设计思想，给出了逻辑功能仿真中的一些常用方法。 |
| 9. | Many times simulations and verifications were taken for the purpose of making our design correct and short our design time
反复的功能仿真和测试为正确的电路设计加快了设计进度。 |
| 10. | But in order to realize full function simulation of vmt there are still many hard task on which we must work
当然，要实现虚拟机床的全功能仿真，还有大量的工作要做，还有待人们作进一步的研究开发。 |
