English translation for "超深亚微米"
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- ultra-deesubmicron
Related Translations:
micron微米: micron (μ)◇微米波 micron wave; 微米汞柱 [力学] micrometer of mercury 亚微米微粒: submicron particle 亚微米技术: submicron technology
- Example Sentences:
| 1. | Longer paths tend to be sensitive to crosstalk - induced delay effects because of their short slack time
因此，超深亚微米工艺下，在设计验证、测试阶段需要对串扰问题给予认真对待。 | | 2. | Experimental results in this paper show our approaches can be efficiently used in delay testing for complex circuits with noise effects
实验表明，本文的方法可以应用在复杂超深亚微米电路的延时故障测试中，有一定推广价值。 | | 3. | Especially with the use and advancement of vdsm ( very - deep - sub - micron ) technology , the faults during manufacturing become more multiple and difficult to test
尤其是超深亚微米( vdsm )工艺的使用，生产过程中出现的故障也越来越多样、难测。 | | 4. | With the rapid developments of slsi technology , the system on a chip ( soc ) technology supported by very deep sub - micron ( vdsm ) and ip - reuse has become the developmental trend of international slsi and the ic mainstream in the 21st century
随着超大规模集成电路工艺技术的发展，以超深亚微米工艺和ip核复用技术为支撑的系统芯片技术( soc )是国际超大规模集成电路发展的趋势和二十一世纪集成电路技术的主流。 | | 5. | The rectilinear steiner minimal tree rsmt problem is one of the fundamental problems in physical design , especially in routing , which is known to be np - complete . this paper presents an algorithm , called aco - steiner , for rsmt construction based on ant colony optimization
制造工艺由超深亚微米vdsm进入到纳米nanometer阶段，作为物理设计physical design重要阶段之一的布线routing ，其算法研究与工具设计面临新的挑战。 | | 6. | Adopts vdsm process technology however two outstanding problems are faced to ic layout design when the feature size reaches to 0 . 18 m or lower : 1 . timing convergence problem seriously affects the circuits schedule , and the interconnect - delay has exceeded more than 70 % of the total circuits ’ delay . 2 . si problem , usually it consists two aspects of ir - drop and crosstalk . these problems often affect the chip function after tapout
本篇论文就是针对超深亚微米阶段soc芯片后端设计所面临的挑战,提出了运用连续收敛的布局布线策略,尤其是虚拟原型的设计理论,来快速验证布局,进而提高布线的成功率,并且提出了一种改进的布局评估模型,提高对soc芯片预测布线的准确度;同时,对于时钟驱动元件选择,文中提出了一种基于正态分布模型来达到更有效的选取。 | | 7. | With the deep sub - micron process being mainstream technique in semiconductor production , the shrinking scale and the expanding size & complexity bring about a series of severe problems , which poses a great challenge on asic ( application specific integrated circuits ) design . we must consider synthesis and test requirements in the early time of front - end design
随着超深亚微米工艺成为半导体业界的主流加工工艺，日渐细微的器件尺寸以及不断膨胀的设计规模和复杂度引起了一系列严峻的问题，给asic设计带来了巨大的挑战，迫切要求在前端设计时就开始考虑综合、验证和测试的需要。 |
- Similar Words：
- "超深勘探" English translation, "超深潜水" English translation, "超深深度" English translation, "超深疏浚" English translation, "超深胎面花纹" English translation, "超深预探井" English translation, "超深渊" English translation, "超深渊；海沟的" English translation, "超深渊沉积作用" English translation, "超深渊带" English translation
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