| 1. | 5 knowles s . a family of adders . in proc
本文设计实现了一种64位新型并行加法器。 |
| 2. | Cooperative design of portal mechanism based on web
的港口机械协同设计实现技术 |
| 3. | Design realization of a high - speed microcontroller
一种高速单片机的设计实现 |
| 4. | Timing analysis and implementation of utopia interface
乌托邦接口的时序分析与设计实现 |
| 5. | Fpga implementation and optimization of viterbi decoder
设计实现与优化 |
| 6. | Design and realization of the multi - media material database
多媒体素材数据库的设计实现。 |
| 7. | 3 realization of three - segment equalizer
3 .三段均衡器的设计实现。 |
| 8. | In the end , a prototype is designed and constructed
最后设计实现了支持以上理论的原型系统。 |
| 9. | Design and implement of a wap - based mobile phone fee querysystem
的随身手机营业厅系统设计实现 |
| 10. | A design realization amp; test of a type of connection pool
一种连接池的设计实现及性能分析测试 |
