| 1. | Evaluation package for mpeg - 2 coder and decoder show its appearance on the market
2编译码器评价组件亮相 |
| 2. | The encoder and decoder used in atm switcher are designed using specific error correcting 1c
设计了atm交换机中编译码器模块。 |
| 3. | 5 . according to the euclidean algorithm rs encoder and decoder are implemented in fpga
根据euclid迭代译码算法，用fpga设计实现了rs码编译码器。 |
| 4. | Enhanced variable rate codec speech service option 3 for wideband spread spectrum digital systems
宽带频谱扩展数字系统用增强的可变率编译码器语音服务选择3 |
| 5. | Finally , a total design scheme that realizes the stbc is shown and the software which supports the platform is also given
之后,给出了空时分组码编译码器的硬件总体设计方案,阐述了软件的具体实现过程。 |
| 6. | Therefore , the research targets of this dissertation are to realize the coding and the decoding of stbc after studying its theory
本文在研究了空时分组码的理论基础上,对其编译码器进行了硬件模拟实现。 |
| 7. | Evrc 3 software distribution for tia - 127 - a - enhanced variable rate codec speech service option 3 for wideband spread spectrum digital systems
Tia - 127 - a的软件配置.宽带频谱扩展数字系统用增强的可变率编译码器 |
| 8. | Improve on algorithms can enhance encoding / decoding performance . with pipeline and systolic array architectures adopted in the hardware implements , encoder / decoder based on fpga can work better
对编译码算法的改进有助于提高rs编译码器的性能，而利用fpga来实现rs编译码器，并采用流水线、心缩式阵列等优化结构，更能提高编译码器的性能。 |
| 9. | Although the structure of stbc decoding is very simple , it can achieve the same diversity gain as the method of mrc , and its use of the spectrum is very high . because of these advantages , sttb is referred into the 3gpp1
由于空时分组码编译码器的结构相当简单,却能获得与最大比合并相同的分集增益,并且它的频谱利用率高,已经被引用到3gpp1中。 |
