English translation for "时钟控制"

clock control
clocked
timer control

Related Translations:

时钟设置:  clock setting

时钟信号:  clock signal◇时钟信号发生器 clock-signal generator

时钟输入:  clock i utclock input

精密时钟:  precision interval clock

时钟同步:  clock synchronization

工作时钟:  work clock

时钟时间:  clock timeclock-time

昼夜时钟:  todc time-of-day clock

时钟速率:  clock rates

时钟机构:  clock work mechanismclockwork

Example Sentences:

	1.	Clock control signal 时钟控制信号
	2.	The function of display panel is to carry on the data scanning for led displaying screen and display a complete image under the controlling of the clock 显示板的功能是在时钟控制下,对led大屏幕进行数据扫描,显示一幅完整的图像。
	3.	The clock control da chip of mb40978 converts rgb digital vedio singal into amplitude - modulated rgb pulse that is magnified and inner - modulate laser 经过处理的rgb视频数字信号经过时钟控制的da转换和一级驱动，产生调幅脉冲信号，实现半导体激光器的内调制。
	4.	This instrument based on lpc932 as the key microprocessor to gather , deal with and store data , to control real - time clock , to complete the liquid crystal display and communication 该仪器基于lpc932单片微机为核心微处理器，来完成数据采集、处理，存储，实时时钟控制，液晶显示，通信等功能。
	5.	This module works with a clock of 40mhz and its input accept lvds signal , output are both in lvds and ecl standard . the setting of the delay parameters is realized with vme software commands 该插件的工作由40mhz时钟控制，输入电平为lvds 、输出为lvds和ecl电平，其初始化通过vme总线加载，并具有多种编程下载方式。
	6.	This paper based on control theory , according to the conception of phrase lock loop and direct digital synthesis , we designed the clock circuit . it realizes the amalgamation of kinds of the ways about clock , which make it has some superiority 本论文在控制理论的基础上，以锁相频率合成和直接数字频率合成作为设计思想，搭建时钟控制电路，在业界实现了多种时钟控制电路实现方法的融合与统一，具有一定的优越性和领先性。
	7.	Based on the research and analysis of system structure of 10 - bit 100msps pipelined cmos adc , according to the system performance , the specifications of sub _ adc is obtained , while the sub _ adc including the preamplifier - latch comparator , the reference ladder resistance and the clock - control encode circuits are discussed in detail 基于对10 - bit100mspspipelinedcmosadc系统结构的分析研究,结合系统性能确定了子adc的指标要求,详细讨论并设计了子adc单元模块的设计,包括预放大锁存比较器,参考电阻串和时钟控制编码电路。
	8.	Secondly , compared with some other kinds of comparator structure and based on the preamplifier - latch fast - compare theory , a novel topology of cmos preamplifier latch comparator circuit is presented . considering trade - off between kickback noise and power dissipation , reference resistance value is optimized . according to the encode demands of different stage resolution , clock - control encode circuit is designed 其后,在具体的子adc设计中,对比各比较器类型的优缺点,并基于预放大锁存快速比较理论,提出一种新型高速低功耗预放大锁存比较器电路拓扑;根据adc系统所允许的参考电压最大波动限制,在回馈噪声对输入参考电平的影响和功耗之间折衷,确定优化的参考电阻串阻值;根据不同级精度的编码要求,设计出时钟控制编码电路。

Similar Words：

"时钟进程" English translation, "时钟进序电路" English translation, "时钟卷走生命" English translation, "时钟开关" English translation, "时钟刻度方向" English translation, "时钟控制窗口" English translation, "时钟控制开关" English translation, "时钟控制逻辑" English translation, "时钟控制面版" English translation, "时钟控制系统" English translation