| 1. | Flip chip bonding technology used in modern micro - photoelectron package
现代微光电子封装中的倒装焊技术 |
| 2. | The report of determination for interface delamination propagation rate of real flip chip packages is hardly found up to now
目前，测定实际倒装焊封装界面分层传播速率报道尚少见。 |
| 3. | The reliability of flip chip package was studied in this work by both experimental measurements and finite element simulations
本文针对倒装焊封装可靠性问题进行了实验和数值模拟两方面的研究。 |
| 4. | To our knowledge , for real flip chip packaging under the thermal loading , the paris equation obtained from experiment da / dn and simulation g is firstly reported here , and will be useful practically
本文在热循环加载条件下对实际倒装焊封装给出实验da / dn和模拟g关系的paris方程，属首次报导。 |
| 5. | Then , the half - empirical paris equation , which can be used as a design base of flip chip package reliability , have been determined from the crack propagation rates da / dn measured and the energy release rates g simulated
然后由实验测得界面裂缝扩展速率和有限元模拟给出的能量释放率，拟合得到可作为倒装焊封装可靠性设计依据的paris半经验方程。 |
| 6. | 2 . the delamination at the interface is one of typical failure mode for electronic packaging . in order to get more understanding of the propagation behaviour of [ he delamination , a series of finite element simulations related were done
为了对界面分层及其传播行为进行深入研究，本文对b型和d型两种实验倒装焊封装，在热循环加载下，进行了有限元模拟。 |
| 7. | The cracking with these two types of underfill might become unstable and lead to catastrophic failure at the end . the critical length was about 12m for the assembly with no - flow underfill and 20m for the package with capillary - flow underfill at 20 ?
模拟表明，山固化温度冷却到室温时，所研究的倒装焊封装在填充不流动胶时芯片断裂临界裂纹长度为12pm ，而填充传统底充胶时为20hm 。 |
| 8. | The flip chip technology developed recently provides the shortest possible leads , lowest inductance , highest frequency , best noise control , highest packaging density , greatest number of inputs / outputs ( i / 0 ' s ) and lowest profile when compared with other popular interconnect technologies
新近发展起来的电子封装倒装焊技术，具有封装密度高、信号处理速度快、寄生电容/电感小等优点，是目前最具发展前景的先进封装技术之一。 |
| 9. | In the second part , the reliability research on electronic packaging was concentrated with finite element method ( fem ) on moisture diffusion in plastic materials , die cracking of flip - chip with no - flow underfill and thermal performance of high power electronic components . in the last chapter , the design tool for advanced electronic package was studied . the main conclusions in the second part are as follows
论文第二部分电子封装可靠性研究包含对塑封材料中水汽扩散研究、填充不流动胶的倒装焊芯片可靠性研究以及大功率器件散热问题研究三方面内容，最后为实现封装设计标准化和自动化，研究了若干最主要的电子封装构型的参数化有限元建模、加载和相应的求解方法。 |
| 10. | According to the m1l - std - 883c standard of thermal cycle loading , the delamination propagation rates at the interface between chip and underfill were studied experimentally by using c - mode scanning acoustic microscope ( c - sam ) for two types of flip chip packages with different states of solder joint
采用mil - std - 883c标准，通过温度循环实验，使用高频超声显微镜( c - sam )无损检测技术，测量了在不同焊点状态下， b型和d型两种实际倒装焊封装芯片与底充胶界面分层裂缝传播速率。 |
