| 1. | Techniques for optimizing the cascode transistor are proposed
我们给出了对cascode场效应管的优化方法。 |
| 2. | Cascode transistor circuit
串联晶体管电路 |
| 3. | For the demand of output swing , the bias is provided by high - swing cascode current mirrors
为了获得高输出摆幅,设计低压共源共栅电流镜为运放提供偏置。 |
| 4. | The impact of the cascode transistor on the noise and linearity performance of the cmos lna is discussed in detail
本文详细分析了cascode场效应管对cmos低噪声放大器的噪声和线性性能的影响。 |
| 5. | By taking the capacitance into consideration , we show new noise figure optimization methods for cmos cascode lnas
在考虑了该电容以后，本文给出了新的cmoscascode结构低噪声放大器的优化方法。 |
| 6. | Based on the volterra series , expressions describing the third - order intermodulation distortion in cmos cascode lnas are derived
基于伏特拉级数，本文推导出了描述cmoscascode结构低噪声放大器三阶互调指标的方程。 |
| 7. | In this paper , the traditional cascode structure of cmos lna is considered as a two - stage amplifier and inter - stage matching network is introduced accordingly
本文也对cmos低噪声放大器进行了分析，将传统共源共栅结构看作二级放大器级联形式，并由此引入级间匹配网络。 |
| 8. | Based on the study of circuit cells which are applied in sige bicmos operational amplifier , the telescope cascode configuration is selected to realize high speed and high gain
其次,通过对sigebicmos运算放大器中电路单元的研究,并结合运放实际设计指标,选择套筒式共源共栅结构作为运放的主体结构以确保高速、高增益的实现。 |
| 9. | 2 . the input stages of the ccii and the operational amplifier in transimpedance implifier are realized with folded cascode amplifier to reach high cmrr , large open loop gain and low offset
2 .为了提高仪表放大器的电源抑制比,并得到大的开环增益,相对低的失调等性能,电流传输器的输入级和跨阻放大器中运算放大器输入级均采用折叠共源共栅放大器。 |
| 10. | According to the analysis of the whole communication system , we verified the feasibility of the design goal put forward previously and used a topology of cascode with source degeneration to design a differential lna
通过对卫星通信系统的链路分析,根据实际系统需要,确定了低噪放模块的设计指标。采用常用的共源共栅拓扑结构,设计了一个差分结构的lna 。 |
