总线接口逻辑 meaning in English
bil bus interface logic
bus interface logic
Examples
- The logic analysis and circuit design of vme bus interface iogic
总线接口逻辑分析和电路设计 - Bbl back - side bus logic . logic for interface to the back - side bus for accesses to the internal unified level two processor cache
后端总线逻辑。访问内部统一二级处理器缓存的后端总线接口逻辑。