logic synthesis meaning in Chinese
逻辑合成
逻辑综合
Examples
- There ’ re two parts in the thesis : the design and implementation of fpga module and the design and implementation of the aes digital audio i / o circuit . i use xilinx corporation ’ s ise4 . 2 as development tools to carry on fpga design , including hdl coding , functional simulation , logic synthesis , place & route and generation of programming files . fpga is used to implement audio routing , sine wave , adc ’ s calibration and led etc , . also , i have downloaded the configuration program into fpga chipset using mcu . eventually , the device is tested and the requirements of design is met
通过测试, etheraudio音频路由器完全达到了设计要求。 etheraudio音频路由器完全符合aes / ebu硬件规范,满足专业音频传输、路由需求。最后,本文还介绍了etheraudio音频路由器在广播电台中的应用实例,通过分析该音频路由器在广播电台的应用方式说明本课题的实际应用价值。 - At the logic synthesis stage , we make some research on the principles of logic synthesis at first , then by utilizing tsmc0 . 25um process , choosing the worst case that the workable temperature can be high to 125 degrees centigrade and the supply voltage is as low as 2 . 25v , and introducing the wireload library for effectively simulating delay and power consumption of wire connection , and taking the same clocks as in simulation , the critical path is 15 . 3ns and the chip area is 0 . 395mm2
在进行逻辑综合时首先对逻辑综合的原理作了一定的了解，然后利用tsmc的0 . 25 m的工艺库，工作电压为2 . 25v ，工作温度最高可达到125摄氏度的最坏情况下，进行逻辑综合时引入了wireload库以便有效的模拟连线所引起的延迟及功耗，采用与模拟时相同的时钟，关键路径为15 . 3ns ，芯片面积为0 . 395mm ~ 2 。 - It ' s suitable for the design of chips that has high performance and large needs . the approach includes system design , logic synthesis , simulation , placement and routing , and etc . as an example , the design process of an asic for frequency measuring is discussed detailed to show how to use this approach quickly and successfully
该方法包括系统设计、逻辑综合、仿真、布局布线等top - down的asic设计步骤。论文以asic测频芯片的设计过程为例，详细分析讨论了定制法的各个设计环节，以实际的设计过程论证各个设计环节，并且解决了在各个设计环节中遇到的问题：可测性设计的考虑、布局布线的考虑等。 - This design for mvbc system adopts top - down eda common design flow . circuit design adopts veriloghdl coding description . function simulation and timing verification adopt simulation tool vcs of synopsys inc , the logic synthesis tool and fpga programming tool adopt the quartus ii of altera inc , and the fpga advice stratix ii ep2s15
该mvbc系统设计采用业界通用的自上而下的eda设计方法,电路逻辑实现采用veriloghdl硬件语言描述,功能和时序验证的动态仿真采用synopsys公司的vcs ,而逻辑综合与fpga实现采用altera公司的集成开发环境quartusii软件以及stratixiiep2s15的fpga器件。 - This paper first discusses the feature of vhdl , and introduces the process of very long digital system by vhdl and auto - synthesis system with the method of top - down through designing control system of color lamp , reveals that it is very important to design digital system , logic synthesis and emulation with vhdl
本文介绍了硬件描述语言的功能特点，并通过彩灯控制系统的设计过程（给出了仿真结果） ，介绍应用硬件描述语言及自动综合系统以自顶向下的方法进行大规模数字系统设计的过程，揭示了硬件描述语言设计数字系统、逻辑综合和仿真等技术在数字系统设计中的重要地位和作用。