logic synthesis meaning in Chinese
逻辑合成
逻辑综合
Examples
- The fourth chapter is the implementation part of carrier recovery in asic , including structure division , hardware design logic synthesis and verification . the asic design skills oriented to synthesis and dft ( design for test ) are discussed in the end
第四章给出载波同步在asic设计中的具体实现，包括结构划分、硬件设计、逻辑综合和验证等，最后讨论了面向综合的asic设计技巧和可测性设计。 - Except for design methodology and technique , some comprehensive experiments are performed . these experiments use some eda tools , including functional simulation with cadence ' s verilog xl , logic synthesis with synopsys ' s design compiler
本文除了介绍的设计方法和设计技巧，还做了一些有益的实验，使用到许多流行的eda工具，如cadence公司的verilog - xl 、 siliconensemble ， synopsys公司的designcompiler 、 physicalcompiler等。 - High - level synthesis has been developed on the base of logic synthesis . it starts from the behavioral design description of high - level and outputs the structural description with lower level as a result . so the design complexity can be simplified and design efficiency can be raised
高级综合是在逻辑综合的基础上发展而来的，它从高层次的行为描述开始，自动综合出低层次的结构描述，从而降低了设计复杂度，提高了设计效率。 - This paper focuses on the combitional logic synthesis including two level logic synthesis and multiple level synthesis . and it is a part of control flow synthesis in a controller synthesis system . in this paper following problems are proposed and implemented : ( 1 ) implement the algorithm " espresso " , and make it suit to the system
本文所完成的组合逻辑综合的研究与实现是控制流综合系统的一个组成部分，其中包括： ( 1 )引入并实现了两级逻辑综合的“ espresso ”算法，定义与系统相适应的数据结构，重新测试各种开关条件，使之适用于系统的实际应用。 - 26th ieee asilomar conference on signals , systems , and computers , pacific grove , ca , usa , october 26 - 28 , 1992 , pp . 391 - 395 . 14 oklobdzija v . an algorithmic and novel design of a leading zero detector circuit : comparison with logic synthesis . ieee transactions on vlsi systems , 1993 , 2 : 124 - 128
而另一方面，该算法与目前国际上其它类似算法相比具有面积和功耗上的明显优势，根据实验结果，采用该算法所实现的电路面积比采用以往类似算法所实现的电路面积减少了27 ，功耗则降低了28 ，因此特别适合在高性能低功耗的浮点加减运算算法中采用。