float-point arithmetic meaning in English
浮点运算
Examples
- Many embedded applications have little or no need for floating - point arithmetic , and software emulation of powerpc floating - point instruction execution is usually more than adequate when it is needed
很多嵌入式应用程序很少或者根本不需要浮点算法，而当需要的时候，对powerpc浮点指令执行进行软件仿真就足够了。 - Thirdly dct is implemented using chen fast dct algorithm . we transform float - point arithmetic into fixed - point arithmetic , which meeting the precision requirements of the ieee 1180 standard , to accord with fixed - point c6201 dsps
随后在dct变换编码中，采用chen快速dct算法，在保证idct精度符合ieee1180标准条件下，将浮点dct系数转化为与c6201定点dsps运算单元相适应的定点系数。 - 2 montoye r k , hokenek e , runyon s l . design of the ibm risc system 6000 floating - point execution unit . ibm journal of research and development , 1990 , 34 : 59 - 71 . 3 oberman s . floating - point arithmetic unit including an efficient close data path
我们采用90纳米cmos标准单元工艺以及synopsys自动布局布线流程进行实验，实验结果表明该算法在高性能双通路结构的浮点加减运算中引入后，可以使得近路径的运算延迟整体降低10 . 2 % ，且算法本身没有造成新的关键路径。 - Floating - point unit is a special microprocessor circuitry unit that deals with floating - point arithmetic operations , which is widely used in scientific arithmetic , cpu , dsp ( digital signal processing ) and image processing , , the thesis discusses how to implement high - performance floating - point processing unit based on the research of its implementation algorithm and its implementation structure
浮点运算单元( fpu )是处理器中专门进行浮点算术运算的电路单元，广泛应用在科学计算、 cpu 、 dsp和图象处理。论文从浮点运算单元的实现算法和结构的研究出发，讨论如何实现高性能浮点运算单元。 - After that , it gives the measures of designing dsp ' s assembler as a part of the dsp ' s software development environment together with the c - compiler . moreover , this paper explores the method of design the floating - point arithmetic unit . referring to the ieee754 - 1985 standard for binary floating - point arithmetic , the algorithm and the behavior description of floating - point adder and multiplier is given , and the simulation and verification is shown at the end of this paper
此外，本文还对处理器的浮点运算单元设计做了初步的研究，以ansi ieee - 754浮点数二进制标准为参考，借鉴了经典的定点加法器和乘法器的设计，尝试性的给出了浮点加法单元和乘法单元的实现模型和行为级上的硬件描述，并对其进行仿真和验证。