测试结构 meaning in English
test structure
Examples
- The emphasis is about the metal line reliability , contact reliability , gate oxide integrity , and hot carrier injection in test . based on the test datum , the reliability of 1 . 0 m process on single failure mechanisms is evaluated , and all the test structures are explained
测试内容上着重介绍了金属化完整性测试、氧化层完整性测试、连接完整性测试和热载流子注入测试，根据测试数据，对1 . 0 m工艺线单一失效机理的可靠性进行了评价，对不同测试结构的作用进行了说明。 - In addition to the dram array , the logic circuitry with the body - bias - controlled soi transistors has been developed for high - speed operation . combine some new techniques for power reduction and our dram array , we design a new low - power soi cmos dram structure and study the performance of our circuits . the results we got in the simulation and test are valuable
第三种，为了简化soi材料的电学性能测试结构，使它的测试，分析，计算摘要与传统的mos模型相兼容，我们通过引入一个耦合因子，将传统的mos模型的测试方法，公式引入soi材料的c v ， i刁测试过程。 - In the logic design , the fundamentals and characteristics of ieee std . 1149 . 1 specification and usb protocol are introduced first of all . according to altera ’ s fpga cyclone , it analyzes the architecture and jtag instructions of boundary scan test ( bst ) . then the dissertation analyzes how to program cyclone device and offer the scheme of the design which is realized in verilog hdl by modelsim and quartus ii software
在接口逻辑设计中,首先分析ieee1149 . 1标准和usb协议,理解边界扫描测试和usb数据传输的工作方式,然后针对altera公司的fpga器件cyclone ,通过分析它的边界扫描测试结构和各种jtag指令,研究它的编程过程和编程特点,并提出设计方案。 - The comparison result is the base of real time branch , through real time comparison and branch , the tester can obtain the test structure as do - while and if - then - else , which can provide powerful support for quick error check and fault location , thus embodies some intelligence during the test course and greatly improves the automation degree of the test system
比较结果可作为实时跳转的依据。通过实时比较和实时跳转,测试人员可以生成类似do - while和if - then - else的测试结构,为快速的故障诊断和故障定位提供了更强大的支持,使整个测试过程体现出一定的智能性,大大提高测试系统的自动化程度。 - In this paper , ieee1149 . 4 std mixed - signal test bus and its characteristic are studied . according to the structure defined in this standard , test methods of mixed - signal circuits are studied . the mixed - signal boundary - scan test system , which is complianted to ieee1149 . 4 std , is designed
本文深入研究了ieee1149 . 4混合信号测试总线及其特点,并根据边界扫描标准定义的测试结构对混合信号电路的测试方法进行研究,设计出符合ieee1149 . 4标准的混合信号边界扫描测试系统。