时钟信号 meaning in English
clock signal
◇时钟信号发生器 clock-signal generator
Examples
- Digital phase lock loop is used in this section to synchronize to an incoming serial data stream
数据接收解码模块中使用了数字锁相环技术从输入数据码流中提取出同步时钟信号。 - The tft lcm driver signals were enable signal and fiducial clock signal , which were strict with synchronization
驱动信号主要为使能信号和基准时钟信号,并要求二者具有严格的同步性。 - Again , the keyboard / mouse always generates the clock signal , but the host always has ultimate control over communication
重复一遍，键盘/鼠标总是生成时钟信号，而主机控制着整个通信过程。 - By means of modulating the clock signal input of hef4752 , six spwm signals are produced
Spwm信号产生电路以大规模集成电路? ? hef4752为核心，通过对输入的三路时钟信号的调制，得到六路spwm信号的输出。 - To achieve this the sampling clock should be isolated as much as possible from the noise present in the digital parts of the system
为此，时钟信号应该尽可能地与电路中强噪声的部分隔离开，例如数字电路。