硬件逻辑 meaning in English
hardware logic
Examples
- The maximum power of systems , the maximum logic gates used for hardware and the maximum length of the software code , etc . the functionality of system can be encapsulated in a class using object - oriented technique
其中，用例图用来描述系统设计中的设计需求和约束条件，约束条件主要包括最大功率、硬件逻辑门的最大使用数和软件代码的最大长度等。 - The research of this task comes from key projects in scientific research of the tenth " five - year plan " ( ( the technology of color spray - paint graph plotter for military use ) ) . a further study has been made of pci2 . 2 bus protocol , and a theoretical summarization of the protocol needed in the design of pci system is presented from the viewpoint of engineering application . . on the basis of a good knowledge of pci bus protocol , this paper suggests a new method of data transmission based on pci on high - speed spray - paint graph plotter , and then designs hardware logic according to the methed , puts pcb board into practice . finally , the wdm drive progam of the hardware device is designed
论文深入研究了pci2 . 2总线协议，并在工程角度上对pci总线协议中项目相关的协议的进行了理论总结。本论文在深刻理解pci总线协议的基础上，提出了高速大幅面新一代彩色喷墨绘图机上基于pci数据传输技术的一种新颖的解决方案，并基于这种方案设计出硬件逻辑，实现pcb板，最后设计出该硬件设备的wdm驱动程序。本文在设计硬件逻辑时，摆脱了传统设计思路，应用了一种新颖的设计方法，应用了quicklogic公司的嵌入式可编程接口芯片q15030来完成接口芯片设计。 - And more than 70 % hardware are tested during microcode self - test since the execution of micro program can cover other data paths . boundary scan is designed according to ieee1149 . 1 , and some other instructions such as degug , runbist are provided to support internal fault testing , online debugging and built - in self - test besides the several necessary insructions . internal scan is implemented by partial scan , through this the boundary of logic component and user - cared system registers can be selected to be scanned
Bist用于测试cpu的微码rom ,其它ram则利用微码rom中的微程序进行测试,而微程序的运行则可以顺带覆盖其它数据通路,从而使高达70 %的硬件得到测试;边界扫描按ieee1149 . 1标准设计,除必备的几条边界扫描指令外,还提供了debug 、 runbist等指令以支持内部故障测试、在线调试及内建自测试;内部扫描采用部分扫描策略,选择逻辑部件的边界及用户关心的系统寄存器进行扫描,从而实现了硬件逻辑划分,方便了后续的测试码产生和故障模拟,并为在线调试打下了基础。 - We can take dsp to realize fast encryption algorithm because of its highly parallelism , application - specific hardware logic , and application - specific instructions . pci transaction and dsp processing of data can take place simultaneously for its dual - access ram ( daram ) and host port interface ( hpi ) . and , the time taken for interruption almost can be ignored because of deep buffer technology
Dsp具有高度的并行结构、专用硬件逻辑以及许多专用指令，可以实现快速加密算法， dsp的双访问ram ( daram )和主机并行接口( hpi )可以实现数据pci传送和dsp处理同时进行，另外采用了深度缓冲技术，使花在主机中断上的时间几乎可以忽略不计，所以基于dsp的计算机数据加密卡pcijmc2000获得了较高的处理速度。 - In the paper the principles and high - speed interface are analized , the requirements of the design are given . system realizing ways are discussed and analysed . design and realization of the interface system and controllers are analysed and demonstrated respectively in detail
论文进行了原理分析,给出高速接口系统的总体方案,然后分别阐述了嵌入式接口系统的实现和控制器的研究实现,前者包括该usb接口的比较选择,以及它的固件与驱动程序设计;在后者中,利用一百万门的fpga实现了硬件逻辑,并实现了fifo 、 sdram控制器。