采样保持电路 meaning in Chinese
sampling hold circuit
Examples
- The slope of inl is two more times than the slope of dnl
并将此技术用于所设计系统的分布式采样保持电路模块中。 - The sample and hold circuit is employed by the bottom plate sampling technique , which could not only cancel the charge injection error but also eliminate the effect of clock feed - through
采样保持电路设计采用了电容下极板采样技术，不仅有效地避免了电荷注入效应引起的采样信号失真，而且消除了时钟馈通效应的不良影响。 - The functional descriptions of these error mechanisms which can reveal how errors of various blocks in adc affect the output sample are provided ; analyses show that the first stage of the converter is dominant in a pipeline
首先,通过研究流水线采样保持电路、子adc 、子dac和残差放大级的主要误差机制,用函数表达式将误差等效到采样输出端,量化各部分误差对系统性能的影响。 - In the design of the circuit of hardware , the paper choose the suitable signal sensor , rationally designing the signal enlarging circuit by programme - controlled and signal filter circuit designing the sampling at datas / retaining circuit and hardware communications based on rs - 485 network . combining with software - controlled it select the integrated gathering - card of a / d datas of the high accuracy for the 12th precision , which simplify software programmings and have higher flexibility and can extensible
在硬件电路的实现上，选择了合适的信号传感器：合理设计了信号程控放大电路和滤波电路；数据采样保持电路和现场基于rs - 485网络结构的硬件通信系统；结合软件控制选用了12位高精度的a d集成数据采集卡，使软件编程简化且具有较高的灵活性和可扩展性。 - The whole system analysis and sub - block design were proceeded to the function requirements . typical sub - blocks were analysed emphatically such as switch capacitor sampling / holding block , brightness control block , oscillator , thermal shut down circuit , ptat and bandgap reference etc . principle and operation of driver circuit are analyzed in the thesis
在电路设计中,结合开关电容采样保持电路、 pwm / linear亮度控制模式以及恒流源驱动等理论给出设计依据,并根据功能需求进行了电路的总体结构设计和子电路设计。