虚级联 meaning in Chinese

virtual concatenation

In this design , up to 64 vc - 12 virtual concatenation is available , or a whole vc - 4 if needed
比如一个10m的以太网，可以采取5个vc - 12虚级联。
Since in this design the system speed is not so high , we can still use hdlc / laps
本论文设计采用虚级联方式实现封装后的数据向sdh的vc - 4中的映射。
My task is to write the code of hdlc / laps , vc - 12 virtual concatenation and sdram interface . the design has been verified on hardware
本论文完成了上述的hdlc / laps协议处理、虚级联处理、 sdram存取的设计及硬件验证并通过了fpga实验验证。
With vc - 12 virtual concatenation , we can make efficient and flexible use of the bandwidth . sdram , as a mass storage medium , is applied also . in this design , i use hy57v643220ct - 6 , with 32bit data width , up to 166m system clock , as the buffer of vc - 12 virtual concatenation alignment and ethernet data transmission
本论文设计系统中采用了现代的hy57v643220ct - 6作为外部存储器，它的数据线是32位宽，保证了吞吐量，时钟可高达166m ，保证了速度，用它实现了多个以太网发送端缓存和多路vc - 12虚级联的对齐。