纠错编码器 meaning in Chinese

error correcting encoder

Above all , [ 12 : 8 ] harming error correction theory is mentioned in this paper . the edac circuit designed by vhdl can works normally at different frequency of the cpu clock such as 66mhz 50mhz 40mhz 33mhz . the edac function of the circuit can also be disabled by software tool . meanwhile , some basic devices such as and logic , or logic , not logic and some small scale integrated circuits are also integrated in the fpga
本论文阐述了12 ， 8汉明码纠错设计过程，采用vhdl语言实现纠错编码器（ edac ），本设计能够适应cpu时钟信号clk2的不同频率，如66mhz 、 50mhz 、 40mhz 、 33mhz ，并且能够通过软件的控制使fpga的纠错编码功能关闭。