生成电路 meaning in Chinese
creation of circuitry
Examples
- Secondly , we prove the self - relation function and correlation function of pseudo noise code sequence and obtain the shift register generating circuit from it ' s generating function
然后，通过伪码的生成多项式，导出伪码的移位寄存器生成电路，并分析了伪码的自相关特性和互相关特性。 - Owing to fact that at present 155 mbits and 2 mbits trunks coexist in the switching network and the latter has a larger share , and traffic has to go through several sdh rings in the transmission network , it is necessary to develop stringent management procedures in configuring the circuits and carry out all - length tests
由于目前交换网155mbits中继和2mbits中继并存,并且仍以2mbits为主，在传输网络中要通过多个sdh环,在配置电路时,要有严格的管理程序，在传输生成电路时，全程测试是不可忽视的环节。 - Abstract : constant components and output opened ports in the result of high - level synthesis lead to explicit redundancy in gate - level technology mapping . explicit redundancy can not improve the performance , but increases power consumption , enlarges circuit area and decreases its testability , so it should be removed . this paper proposes a queue loop optimization algorithm to remove explicit redundancy completely which decreases the circuit area and improves the testability
文摘:高级综合结果中常量元件和输出悬空端口导致门级工艺映射结果中存在显式冗余.显式冗余无助于提高电路性能，反而增加功耗，降低电路的可测试性，使电路面积增大，应予消除.文中提出了显式冗余的队列循环优化算法，完全消除了此类冗余，从而有效地减少了生成电路的基片面积，提高了电路的可测试性 - It has been playing an important role in equipping all kinds of arms and services for campaigns , tactical exercises and emergent actions etc . based on the detailed analysis of the exchange ' s architecture and implementing , this thesis points out some disadvantages of the device , such as too many absolute components , not very high enough reliability and security , very large size and weight , operating and maintaining difficultly . considering low power requirement and man - machine interface optimizing design at the same time , the thesis come up with an integrated design scheme to the previous device based on " mcu + cpld / fpga architecture " : ( 1 ) signal frequency dividing , timing frequency producing , 20 customers " led states controlling are implemented in cpld ; ( 2 ) decoding , latching data and controlling signals are implemented in cpld by bus interface between mcu and cpld ; ( 3 ) chip selecting principles and mcu idle mode design are completed under the consideration of low power requirement ; ( 4 ) operation by chinese lcd menus is adopted in the man - machine interface
本项目以该交换机为研究对象，在详细分析原设备的系统结构和功能实现方式的基础上，指出该机型在使用过程中存在技术相对陈旧、分立元件过多、可靠性和保密性不够、体积大、重量大、维修困难等问题，同时结合系统的低功耗需求和优化人机接口设计，本文提出基于“单片机+ cpld fpga体系结构”的集成化设计方案：在cpld中实现信号音分频和计时频率生成电路、 20路用户led状态控制电路； cpld与单片机以总线接口方式实现译码、数据和控制信号锁存功能的vhdl设计；基于低功耗设计的器件选型方案和单片机待机模式设计；人机接口的lcd菜单操作方式。