模拟时间 meaning in Chinese

simulated time

Object are checking the simulated time at a couple of points , and logging some durations to the
仅仅是检查几个点上的模拟时间，并将持续时间记录到
To reduce the simulation time of large circuits , parallel logic simulation has attracted considerable interest in recent years
为减少大规模电路的模拟时间，近年来大家的兴趣转向了并行模拟。
The experimental data based ( ebd ) model proposed by gao was used to establish the relation between imcs and real time temperature kinetics in our simulation . mc simulation is the main methodology in our research
本文采用了gao等人提出的edb模型来建立mc模拟时间与实际时间的联系，采用edb模拟可以充分利用现有的超细晶粒钢等温实验数据。
Using this method , the simulation can be performed with large step ( low order wavelet ) for transient state response , and small step ( high order wavelet ) for steady state response so that the excessive computing time for transient state simulation can be saved
该方法可以对电路瞬态响应过程用大步长（低阶小波）模拟，而对稳态响应过程用小步长（高阶小波）模拟，从而避免了为得到电路稳态响应而在瞬态响应时期花费大量的模拟时间。