核心硬件 meaning in Chinese
hard core
hardcore
kernal hardware
Examples
- As network processor become core hardware in the next generation network device . the research in this paper is security of network information transmission based - on network processor
因此网络处理器将成为下一代网络设备的核心硬件，本文的研究问题是基于网络处理器的网络信息传输的安全性。 - It uses adi company ’ s blackfin 533 as a cpu to realize vedio real - time decoding , and uses pc to realize vedio real - time coding . then the solution of the vedio command system in sse is presented
文章采用adi公司的blackfin533来作为核心硬件处理器来实现视频实时解码,采用pc机实现视频实时编码,给出了单兵作战视频指挥系统解决方案。 - Using the knowledge of mechanics and transducer , the water level induce part was developed to measure the water level signal in effect . the researchers designed the hardware part on the basic of the knowledge of electro circuit , the computer principle and the intelligent designing theory
同时，根据电子电路知识、计算机控制原理及智能化仪表的设计思想，采用现代仪器设计中的期间解决方案，对水位计系统的核心硬件控制部分进行了较为全面的设计。 - Using the knowledge of mechanics and transducer , three signal induce parts were developed to measure three kinds of singals in effect . the researchers designed the hardware part on the basic of the knowledge of electron and electrocircuit , the computer principle and the intelligent designing theory
同时，根据电子电路知识、计算机控制原理及智能化仪表的设计思想，采用现代仪器设计中的器件解决方案，对灌封系统的核心硬件控制部分进行了较为全面的设计。 - We select fpga of type xc3s200 as hardware to design the coder and display the hardware resources inside , moreover study the method and steps of designing dsp , based on fpga , by using system generator , finally , it emphasizes the design process of multi - band excitation vocoder . we can work out the module of high pass filter and the module of low pass filter , module of divide frame , module of keynote rough estimate , module of keynote fine estimate , module of band - separated v / u judgment / verdict and module of band - separated amplitude estimate , by using simulink , ise and system generator
本文选用型号为xc3s200的fpga作为设计编码器的核心硬件,介绍了其内部所含的硬件资源,并研究了利用systemgenerator基于fpga设计dsp的方法和步骤,最后,本文把重点放在多带激励语音编码器的设计上,利用simulink , ise和systemgenerator分别设计其中的高通低通滤波器模块、分帧叠加模块、基音粗估模块、基音精细估计模块、分带v / u判决模块、分带幅度估计模块。