总线请求 meaning in Chinese

bus request

Then the designs of modules mentioned in the scheme are discussed in detail . the main contents of the dissertation include : 1 . to satisfy the need of a16 / d16 single - cycle and block data transfer capability , the method of the state machine and diagram are adopted . the arbiter , requester , interrupter , interrupter handler modules are also implemented by use of the state machine . these modules are verified theoretically by using timing simulation
本文具体工作如下: 1 .用状态机和电路图的方式实现了vme总线a16 / d16单周期数据读写和块传输功能;并用状态机设计了vme总线请求器,总线仲裁器,中断器和中断处理器等,并进行了时序仿真。