总线功能模型 meaning in Chinese
bfm
Examples
- The main research work of this dissertation is as following : firstly , two ip logic designs have been accomplished in this dissertation , which are described by verilog hdl , and based on hld ( high - level - design ) technique
对如何编写仿真测试程序的各种方法进行了介绍，其中着重介绍了一种结构化的仿真测试方法? ?总线功能模型( busfunctionmodel ) ，并将其应用本设计中。 - Finally , it researches on how to optimize constructs in order to improve the reusability of components and models , compares the testbench using the non - reusable structure with that using the reusable structure , concludes that the latter can improve the verification efficiency , verifies the conclusion by programming a few examples , proposes the way of encapsulating bus functional model , gives the constructs , code and recall of i386sx bus function model , and attempts to realize model generation automation and monitoring automation
最后研究了如何通过优化结构来提高构件和模型的可再用性；对采用不可再用和可再用结构的测试平台进行了比较，得出了后者更能提高测试效率的结论，并通过实际的编程验证了这个结论；提出了总线功能模型的封装方法；给出了i386sx总线功能模型的结构、代码和调用过程，并在使模型自动激发和监控方面做了初步的尝试。 - This dissertation studies the reuse methodology in the verification , analyzes the intellectual property standalone verification platform , discusses the design methods of bus function model and bus monitor in the reusable function verification platform , investigate the difference in the reusability of the implementation mode of task - based and state machine - based bus function model and present the reusability design rules in the bus monitor
在此基础上，分析了ip单独验证平台，并讨论了该验证平台中总线功能模型和总线监视器的设计方法，研究了基于任务和基于状态机两种总线功能模型的实现方式在可重用性方面的区别，并提出了总线监视器的可重用性设计规则。 - A research is done for studying the reusable design principles of bus function model ( bfm ) and bus monitor for reusability . the functional verification framework is proposed in this dissertation can be apply in soc system level , rtl level and gate level verification . we accumulated experiences to soc functional verification
讨论了功能验证平台中总线功能模型( busfunctionmodel ， bfm )和总线监视器( busmonitor )的设计方法，给出了可重用设计的规则；本论文建立的soc功能验证系统结构，可以应用于较大规模的soc的系统级、寄存器传输级和门级的验证中，通过本课题研究，为国内soc功能验证积累经验，为国家超大集成电路的发展奠定一个坚实的基础。