寄存器级 meaning in Chinese
register level
register stage
Examples
- Verilog ? register transfer level synthesis
Verilog寄存器级合成 - Abstract : the main points about development of application programs based on visa for vxibus are presented , including addressing an instrument , accessing a message - based device and a register - based device , handling events and errors . some practical programs are presented
文摘:介绍了利用visa库进行vxi总线编程的几个要点,包括仪器的寻址、消息级器件的访问、寄存器级器件的访问、异步事件处理和出错处理等,并给出了示例程序。