寄存器堆 meaning in Chinese
register file
Examples
- To achieve this , an architectural power model for multi - port register - file is presented firstly . based this model , several practical optimization techniques are applied to reduce the power of register - file . the experimental results show that these techniques can reduce about half power of register - files in godson - 2
并进一步提出通过减少侦听浮点总线的项数以及减少指令立即数域的保存等方法减少发射队列中相应部分的开销,有效降低了面积和功耗; 4 .提出了物理寄存器堆的低功耗访问方法。 - In this paper , the methodology and implementation with hdl of design based reconfigurable architecture are discussed in detail , which includes the implementations of algorithms circuit , register file with controllable node , decoder , interface and main controller . from the introduction of design process of every module circuit , we can see easily some general feature of vlsi design with hdl
在此基础上详细讨论了基于可重组体系结构的密码芯片设计方法和各电路实现的结构图，包括算法电路、可控节点寄存器堆、译码电路、接口电路和主控模块电路等。通过对各个模块设计过程的介绍，阐明了使用hdl语言设计超大规模集成电路的一般特点。 - Rtos - 1750 make use of static memory management to implement memory protection provided by page register ' s memory mapping and bpu ( block protect unit ) , with which system keep fast reference as well as relatively independence by the technology of strding - mapping . system manages inner interrupt and outer interrupt by priority classing strategy and provides four type timers , which are system timer , software timer , auxiliary timer and real - time timer
系统充分利用1750a提供的页面寄存器堆的内存映射功能和块保护单元( bpu )提供的存储器保护功能，采用静态内存管理方式，既保证了任务之间的相对独立，又通过跨段映射技术满足了dcmpofp中的任务快速引用的要求。