外围总线 meaning in Chinese

peripheral bus
peripheral trunks

The misc logic module can capture and lock the errors of processor local bus and on - chip peripheral bus . these errors can be shown by light - emitting diode light . the chipscope _ ila core is used for debugging the fpga logic and timing
而辅助逻辑主要是用来捕获并锁定powerpc ~ ( tm ) 405的处理器局部总线( plb )和片上外围总线( opb )的错误,并通过led灯进行显示。
The peripheral equipment , which includes serial control , b3g test tools , ddr control , interrupt control , connect the on - chip peripheral bus of powerpc ~ ( tm ) 405 . in addition , the clock module and the misc logic module are necessarily to make the b3g test platform work . in order to debug the b3g test platform , the chipscope ~ ( tm ) core is adopted
在powerpc ~ ( tm ) 405的外围总线上开发了串口控制器、 b3g测试工具、双倍数据流( ddr )内存控制器、中断控制器等外设;整个系统还需要时钟、辅助逻辑等模块;为了方便b3g测试平台的调试,将chipscope ~ ( tm )核也嵌入到了平台中。