上华半导体 meaning in Chinese
csmc
Examples
- In this study , the design procedures for mitigating radiation effects mechanisms have been implemented in a gate array design , we have obtained samples of integrated circuits test structures manufactured by wuxi csmc - hj using their 0 . 6 - m cmos process
在研究中，我们将降低辐射效应的设计方法应用到门阵列设计中，获得了华晶上华半导体有限公司采用0 . 6 m的cmos工艺生产的集成电路样片，具有100krad ( si )的抗总剂量辐射能力。 - To date , most research on cmos rf circuits is focused on cmos rf front - end including some key building blocks such as low - noise amplifier ( lna ) , mixer , bandpass filters , voltage control oscillators and power amplifiers . in si rf 1c , inductors need be realized on a silicon substrate along with all of the other devices in a single chip . in fact , the need for high q integrated inductors in rfics is increasing
在无线通信技术对cmos射频集成电路需求的大背景下，本论文在大量深入调研的基础上，围绕射频集成电路中必不可少的、有多种应用的无源器件?硅集成电感及其相关的cmos射频集成单元电路，先后在上海冶金所微电子分部工艺线上及利用上海市科委的多目标芯片项目( mpw )在无锡华晶上华半导体有限公司进行了大量的实验研究，得到了一些新的结果。 - Fourthly , new type of keyboard circuits designed in this chip can save the system working time and reduce the power dissipation according to usual polling circuits . the chips are on two die of 2 * 2 mm2 using 0 . 6um cmos mix - signal technology ( double well , double poly , double metal ) including sending part and receiving one respectively
本芯片采用数模混合设计，参加了由上海集成电路中心( icc )组织的mpw (多晶圆)计划，在无锡上华半导体有限公司流片，采用上华0 . 6um混合cmos工艺(准双阱、双层多晶硅、双层金属) 。