English translation for "在外部的"
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- foreign
Related Translations:
在外: not including; excluding; outside; extra-; exo-; epi- 今晚在外: steppin out tonight 单身在外: live alone away from home 在外地: in other localities or localityout 排斥在外: to preserve legitimate competition among all common carriers
- Example Sentences:
| 1. | Your employees post their working times at external time recording subsystems . you can use the certified hr - pdc interface ( which has more than 60 certified providers ) for this purpose 员工提交工作时间在外部的记录系统。你可以使用认证的hr - pdc借口(其超过60种认证供应)对这个用途。 | | 2. | This page of the options dialog box allows you to choose documentation sets and whether to display topics internally in the integrated development environment or externally in a separate window “选项”对话框的此页使您可以选择文档集,并选择是在集成开发环境( ide )内部显示主题,还是在外部的独立窗口中显示主题。 | | 3. | This technique gives rise to significant advantages , since it increases performance , reliability and simplicity of installation , with consequent benefits in terms of costs as compared with other systems based on external interpolation 这种技术提升了信号的优势,性能,安装简单化和使用可靠性得以增强,随之而来与其他信号细分在外部的系统相比费用会比较低。 | | 4. | The basic elements of a control system using a digital computer consist of the data - gathering devices which perform analog - to - digital conversion on data form the system which is to be controlled ; the digital computer itself , which performs calculations on the data supplied and makes the necessary decisions ; and the means of communication with , or control over , certain of the elements in the external environment 由在数据上执行模拟数字的转化的设备形成将被控制的系统的集合数据使用一台数字的计算机的一个控制系统的基本的元素组成;数字的计算机自己,在供应的数据上它执行计算并且做必需的决定;并且通讯的工具与,或控制上,肯定在外部的环境的元素的。 | | 5. | The main process includes following : system design , module design , function simulation , time simulation and hardware verification . the whole system is divided into several modules and each module is connected by signals , which based on the arithmetic of uart and the requirement of design . the module design is to design inner circuit structure of each module and uses verilog language to code the code 系统设计是基于uart的实现算法和设计指标要求,对系统划分模块以及各个模块的信号连接;模块设计是设计出每个模块的功能,并用verilog一hdl语言编写代码来实现模块功能;功能仿真和时序仿真使用的工具是以dence的nc _ veri109 ,首先对系统的每个模块进行功能和时序仿真,仿真通过之后,将整个系统的代码在外部的输入端口加上激励,对整个系统进行功能和时序仿真;硬件验证是用fpga对系统进行了功能验证。 |
- Similar Words:
- "在外表面之间" English translation, "在外表上" English translation, "在外部" English translation, "在外部, 外表上, 从外面, 在外面, 从外部" English translation, "在外部窗口" English translation, "在外部空间" English translation, "在外部视窗" English translation, "在外侧的" English translation, "在外层空间可储存性" English translation, "在外插值之后" English translation
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