| 1. | The report of determination for interface delamination propagation rate of real flip chip packages is hardly found up to now
目前，测定实际倒装焊封装界面分层传播速率报道尚少见。 |
| 2. | The reliability of flip chip package was studied in this work by both experimental measurements and finite element simulations
本文针对倒装焊封装可靠性问题进行了实验和数值模拟两方面的研究。 |
| 3. | Lead in solders to complete a viable electrical connection between semiconductor die and carrier within integrated circuit flip chip packages
完成某集成电路封装（叩焊芯片）内部实际的电气连接的焊料中的铅。 |
| 4. | Lead in solders to complete a viable electrical connection between semiconductor die and carrier within integrated circuit flip chip packages
集成电路倒装芯片封装中半导体芯片及载体之间形成可靠联接所用焊料中的铅。 |
| 5. | To our knowledge , for real flip chip packaging under the thermal loading , the paris equation obtained from experiment da / dn and simulation g is firstly reported here , and will be useful practically
本文在热循环加载条件下对实际倒装焊封装给出实验da / dn和模拟g关系的paris方程，属首次报导。 |
| 6. | Then , the half - empirical paris equation , which can be used as a design base of flip chip package reliability , have been determined from the crack propagation rates da / dn measured and the energy release rates g simulated
然后由实验测得界面裂缝扩展速率和有限元模拟给出的能量释放率，拟合得到可作为倒装焊封装可靠性设计依据的paris半经验方程。 |
| 7. | According to the m1l - std - 883c standard of thermal cycle loading , the delamination propagation rates at the interface between chip and underfill were studied experimentally by using c - mode scanning acoustic microscope ( c - sam ) for two types of flip chip packages with different states of solder joint
采用mil - std - 883c标准，通过温度循环实验，使用高频超声显微镜( c - sam )无损检测技术，测量了在不同焊点状态下， b型和d型两种实际倒装焊封装芯片与底充胶界面分层裂缝传播速率。 |
