面市时间 meaning in English

time to market

In the electronic industry today , the combination of increasing complexity of todays asic and systems designs and relentless time - to - market ( ttm ) pressures has resulted in verification , especially functional verification , jumping to the top of the list of bottlenecks in the design and development of electronic products utilizing soc
近几年来随着专用集成电路( asic )和系统芯片( soc )的复杂度的不断提高，以及来自面市时间的巨大压力，芯片验证，尤其是功能验证正日益成为电子产品开发和设计的“瓶颈” 。
However , as time - to - market pressures and chip complexity grow , current design tools and methodologies are inadequate for developing million - gate socs from scratch . reuse of pre - designed and pre - verified circuit modules , known as ip ( lntellectual property ) , is the most promising method to bridge the gap between large gate number and designer productivity
但由于soc的规模非常庞大，很少有单个公司能够承担整个soc的开发和维护，加之面市时间( time - to - market )的巨大压力，人们逐渐认识到基于预先设计好的ip ( intellectualproperty )进行soc的集成是提升soc设计效率的非常有效的方法。