芯片尺寸封装 meaning in English

chiscale package
cschisize package
csp chip size package

Ultrathin wafer level chip size package technology
超薄型圆片级芯片尺寸封装技术
Ut - scsp ultra - thin - stacked chip size package
超薄叠层芯片尺寸封装
As an advanced package , 3 - d stacked csp assembly provides significant size and performance advantages than traditional single chip package . meanwhile , high packaging density tends to generate more power in a package and cause serious thermal problem
三维叠层芯片尺寸封装( stackedchipscalepackage )是目前最先进的微电子封装形式之一,具有体积小、重量轻、封装效率高等特点。