编码电路 meaning in English
coding circuit
encode circuit
Examples
- The whole correlation - inheritance coding circuit system is designed , simulated and verified in verilog hdl on the candence systems
采用了硬件描述语言verilog对整个相关继承矢量量化图像编码电路系统在cadence系统上进行了西安理工大学硕士论文设计、仿真及时序验证。 - Finally , considering the advantages and disadvantages of these algorithms , a trade - off algorithm is proposed . a corresponding vlsi coding circuit system is designed and verified with fpga
最后结合各个算法的优点，综合考虑各方面性能，给出一个折衷的快速搜索算法，并且设计出与算法对应的编码电路系统。 - The fpga post simulation results prove that the trade - off algorithm is an effective fast search algorithm of vq coding on the three aspects of reducing the coding time , improving the reconstructed image quality , and lowering the difficulty of vlsi implementation
该编码电路的fpga实现及fpga验证结果表明，本文提出的快速算法大大地减少了编码时间、有效地提高了恢复图像质量，同时也降低了硬件实现的难度。 - Then , this paper presents an improved t measuring speed method basing on t measuring speed method , and simultaneously realizes speed and angle measuring with two quadrature encoder pulse circuits of tms320lf2407a . the measuring speed formula is amended based on measuring speed error analysis
其次,在t法测速的基础上提出了一种改进的t法测速法,并利用tms320lf2407a的两组正交编码电路同时实现速度与角度测量,在分析测速误差的基础上,对测速公式进行修正。 - This thesis focuses on the ingress process module of ctu , which translates c - 5 dcp format to rainier 4gs3 . the specification analysis , architecture and logic design , functional simulation testbench design , synthesis report and testing result are discussed in this thesis . the research work mainly includes : the specification analysis and design requirements of ctu logic ; the architecture and logical design of ingress process module , which includes receive control fsm , send control fsm and cell position adjustment logic ; the performance improvement of ingress process module to receive and transmit data cell at the full line speed
本论文的主要研究工作包括：通信协议转换逻辑的功能分析和设计需求；通信协议转换逻辑上行方向的系统分析及体系结构设计，包括上行接收状态机、发送状态机、信元内字节位置调整机制等的设计；通信协议转换逻辑上行方向的线速设计，主要是上行接收的线速设计，要使用流水设计技术；提出了高速实现roundrobin调度策略的实现方法，并设计实现了桶式移位器和优先级编码电路；应用bfm仿真模型设计了上行处理各模块的仿真testbench ，完成了各级模块的模块仿真和系统集成仿真。