浮点运算单元 meaning in English
floating point unit
Examples
- Fpu float point unit
浮点运算单元 - Fpu float point unit
浮点运算单元 - Floating - point unit is a special microprocessor circuitry unit that deals with floating - point arithmetic operations , which is widely used in scientific arithmetic , cpu , dsp ( digital signal processing ) and image processing , , the thesis discusses how to implement high - performance floating - point processing unit based on the research of its implementation algorithm and its implementation structure
浮点运算单元( fpu )是处理器中专门进行浮点算术运算的电路单元，广泛应用在科学计算、 cpu 、 dsp和图象处理。论文从浮点运算单元的实现算法和结构的研究出发，讨论如何实现高性能浮点运算单元。 - Based on s698 technology , obt - devsys - s698 is one of the serial s698 - mil application development systems including 32 - bit embedded processor with 32 64 - bit fpu 160mhz processing speed sram memory controller flash memory controller uart ps 2 led interrupter controller , etc . the bus interfaces is composed of i2c spi magnetic card interface and ic card interface . obt - devsys - s698 carries on the advantages of s698 serial module such as compact structure and reasonable composition
Obt - devsys - s698是s698系列嵌入式处理器开发板中的一员，其上包括：具有32 64 - bit浮点运算单元的32 - bit嵌入式处理器，主频160mhz ， sram存储器， flash存储器具有三路uart接口，一路ps 2接口， led发光二极管控制电路，中断操作按钮其外扩总线包括i2c总线接口spi总线接口磁卡接口智能卡接口等。 - After that , it gives the measures of designing dsp ' s assembler as a part of the dsp ' s software development environment together with the c - compiler . moreover , this paper explores the method of design the floating - point arithmetic unit . referring to the ieee754 - 1985 standard for binary floating - point arithmetic , the algorithm and the behavior description of floating - point adder and multiplier is given , and the simulation and verification is shown at the end of this paper
此外，本文还对处理器的浮点运算单元设计做了初步的研究，以ansi ieee - 754浮点数二进制标准为参考，借鉴了经典的定点加法器和乘法器的设计，尝试性的给出了浮点加法单元和乘法单元的实现模型和行为级上的硬件描述，并对其进行仿真和验证。